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    Forum: Miscellaneous
     Topic: a metal using lammps
    a metal using lammps [message #17958] Mon, 17 June 2019 00:26
    nikita is currently offline  nikita
    Messages: 41
    Registered: March 2017
    Member
    How to create twin boundaries (code) in a metal using lammps. Trying to simulate the effects of twin boundaries in strengthening of copper so  require twins in initial copper structure which can deform?
     Topic: grain boundaries
    grain boundaries [message #17959] Mon, 17 June 2019 00:28
    nikita is currently offline  nikita
    Messages: 41
    Registered: March 2017
    Member
    What is the best etch solution for aluminum 5083? I have tried some solutions like kellers,NAOH and HFto see aluminum 5083 microstructure after ARB process.but unfortunately grain boundaries are not visible.
     Topic: general tool
    general tool [message #17960] Mon, 17 June 2019 00:43
    milan is currently offline  milan
    Messages: 83
    Registered: January 2015
    Member
    Is there any general tool which enables the separation of martensite and bainite using EBSD?
     Topic: among the concrete sample
    among the concrete sample [message #17964] Mon, 17 June 2019 01:11
    priya is currently offline  priya
    Messages: 70
    Registered: April 2014
    Member
    Which one among the concrete sample, cement paste and cement mortar sample is ideal for microstructure characterization studies?
     Topic: crystallization peak
    crystallization peak [message #17965] Mon, 17 June 2019 01:13
    priya is currently offline  priya
    Messages: 70
    Registered: April 2014
    Member
    Why any crystallization peak is not observed in some of the oxide glasses after the glass transition in DSC /DTA curves? (e.g BK7 borosilicate glass)
    Forum: Micro Electronics/Semiconductors
     Topic: Electromagnetic effects
    Electromagnetic effects [message #17956] Mon, 17 June 2019 00:22
    nikita is currently offline  nikita
    Messages: 41
    Registered: March 2017
    Member
    How can asynchronous processors better deal the Electromagnetic effects than clocked processors?
     Topic: MIMO-OFDM System
    MIMO-OFDM System [message #17957] Mon, 17 June 2019 00:24
    nikita is currently offline  nikita
    Messages: 41
    Registered: March 2017
    Member
    Why we should do ASIC Implementation of MIMO-OFDM System?
     Topic: microplaty hematite
    microplaty hematite [message #17961] Mon, 17 June 2019 00:53
    priya is currently offline  priya
    Messages: 70
    Registered: April 2014
    Member
    What is the difference between microplaty hematite and specularite on microphotograph (in general)?
     Topic: characterize microstructural
    characterize microstructural [message #17962] Mon, 17 June 2019 01:06
    priya is currently offline  priya
    Messages: 70
    Registered: April 2014
    Member
    How to characterize microstructural variation between the uncoated and coated Ti-based alloys?
     Topic: work-hardening
    work-hardening [message #17963] Mon, 17 June 2019 01:08
    priya is currently offline  priya
    Messages: 70
    Registered: April 2014
    Member
    Which process leads to higher work-hardening rate of austenitic stainless steel: cross slip or planar slip?
     Topic: understand intuitively
    understand intuitively [message #17966] Mon, 17 June 2019 01:15
    priya is currently offline  priya
    Messages: 70
    Registered: April 2014
    Member
    The term saturation often confusing while we try to understand bjt and mosfet behavior in saturation region. How can we understand intuitively?
     Topic: Body biasing techniques
    Body biasing techniques [message #17967] Mon, 17 June 2019 01:18
    rucha is currently offline  rucha
    Messages: 59
    Registered: October 2014
    Member
    Body biasing techniques is used for low power cmos design.How to calculate the maximum source to bulk voltage before latch up problem occurs?
     Topic: While simulating SRAM cell
    While simulating SRAM cell [message #17968] Mon, 17 June 2019 01:20
    rucha is currently offline  rucha
    Messages: 59
    Registered: October 2014
    Member
    While simulating SRAM cell. Does the total power dissipation which the tool has calculated during transient analyses include the capacitance of bit lines?
     Topic: VLSI Architecture
    VLSI Architecture [message #17969] Mon, 17 June 2019 01:25
    lakshmi is currently offline  lakshmi
    Messages: 42
    Registered: February 2015
    Member
    How to optimize the VLSI Architecture and how to Synthesize it?
     Topic: system verilog?
    system verilog? [message #17970] Mon, 17 June 2019 01:31
    lakshmi is currently offline  lakshmi
    Messages: 42
    Registered: February 2015
    Member
    What are the steps for driver development of getting data from file and sending it serially in system verilog?
     Topic: linear or log-sigmoidal
    linear or log-sigmoidal [message #17971] Mon, 17 June 2019 01:34
    sandesh is currently offline  sandesh
    Messages: 33
    Registered: December 2016
    Member
    In pattern recognition applications, which function for the Neural Network output layer is the best, linear or log-sigmoidal?
     Topic: Mono-stable circuit
    Mono-stable circuit [message #17972] Mon, 17 June 2019 01:36
    sandesh is currently offline  sandesh
    Messages: 33
    Registered: December 2016
    Member
    Is it feasible to have the VLSI Implementation of Mono-stable circuit only at leading edge of the Pulse?
     Topic: radix number system
    radix number system [message #17973] Mon, 17 June 2019 01:38
    juhi is currently offline  juhi
    Messages: 63
    Registered: February 2015
    Member
    Why is it required to go for a higher radix number system if the final result is implemented back to binary?
     Topic: VLSI design software
    VLSI design software [message #17974] Mon, 17 June 2019 01:40
    juhi is currently offline  juhi
    Messages: 63
    Registered: February 2015
    Member
    In VLSI design software such as cadence how can we calculate the delay between two different outputs and delay between input and output?
     Topic: algorithms representing VLSI circuits
    algorithms representing VLSI circuits [message #17975] Mon, 17 June 2019 01:43
    sonal is currently offline  sonal
    Messages: 22
    Registered: March 2017
    Junior Member
    Is differential evolution (DE) suited for large scale optimization problems (quantification of algorithms representing VLSI circuits)?
     Topic: cadence is reversible
    cadence is reversible [message #17976] Mon, 17 June 2019 01:45
    harshatha is currently offline  harshatha
    Messages: 62
    Registered: May 2014
    Member
    How do we prove a reversible circuit implemented in cmos using cadence is reversible or not